Advanced Technology CPU Computer Chip
A brand new two-dimensional semiconductor construction sharply reduces resistance the place electrical areas meet. The outcome factors towards quicker, extra energy-efficient next-generation electronics. Credit: Stock

One of the most important obstacles limiting the subsequent era of laptop chips might lastly have a resolution.

The shrinking of laptop chips has uncovered a cussed drawback: even when a semiconductor can carry electrical energy effectively, getting that electrical energy into the fabric can waste energy and sluggish the system down.

Researchers in South Korea have now demonstrated a attainable approach round this impediment. Their design permits electrical present to maneuver easily from a conductive area into a semiconducting area with out crossing the standard junction between two separate supplies. The group additionally straight mapped the motion of costs on the nanometer scale, offering experimental proof that the brand new interface doesn’t disrupt the present.

The advance might assist the event of smaller and extra energy-efficient electronics, together with AI processors, low-power units, and future logic chips.

The analysis was led by Professor Seungbum Hong of KAIST’s Department of Materials Science and Engineering, in collaboration with Professor Kibum Kang at KAIST and Professor Sung Beom Cho’s team at Sungkyunkwan University.

Ultralow Barrier Charge Flow in a Monolithic 2D Junction
Infographic about the study. Credit: KAIST

Why Contact Resistance Holds Back Smaller Chips

Modern transistors depend on metal electrodes to deliver electricity into a semiconductor. However, the boundary where those materials meet can resist the movement of electrical charges. This contact resistance consumes energy, produces heat, and limits how much performance engineers can gain by making transistors smaller.

The problem is particularly important for two-dimensional semiconductors. These materials can be only one or a few atomic layers thick, making them attractive for electronics that may eventually need to operate at dimensions beyond the practical limits of conventional silicon. Yet their extreme thinness also makes it difficult to create efficient electrical contacts without damaging or altering the semiconductor.

Instead of placing a separate metal electrode on top of the semiconductor, the researchers created conductive and semiconducting regions inside one continuous sheet of platinum diselenide (PtSe₂).

PtSe₂ Semiconductor Structure Eliminates Electrical Bottlenecks
Conceptual diagram of the research explained by KAIST’s mascot character (Nubzuki). Credit: KAIST, AI-generated image

PtSe₂ is especially useful for this approach because its electronic behavior changes with thickness. Thicker regions can act as a semimetal, while thinner regions behave as a semiconductor. This allows different electronic functions to be built from the same underlying material rather than joining two unrelated materials together.

The resulting structure was monolithic, meaning the PtSe₂ film continued across the boundary without a physical break. In principle, that seamless connection should give charges a more direct route into the semiconductor and avoid some of the resistance created by conventional metal contacts.

Watching Current Flow at the Nanoscale

To test whether that was actually happening, the team used Atomic Force Microscopy (AFM). The technique moves an extremely fine probe across a surface to measure its physical and electrical properties at very small scales.

The researchers combined this approach with in-plane current detection, allowing them to map how charges traveled from the semimetallic section into the semiconducting section of the PtSe₂ film. The study was published in the journal Matter.

KAIST Team That Worked on the “Electrical Bottleneck” in Semiconductors
(From left to right) KAIST Professor Kibum Kang, Dr. Minseung Gyeon, Ph.D. candidate Yeongyu Kim, and Professor Seungbum Hong; and, in the circles from left, Sungkyunkwan University Ph.D. candidate Ji Hoon Hong and Professor Sung Beom Cho. Credit: KAIST

The images showed that the current continued across the boundary without being blocked or forced away from its path. According to the researchers, this is the first direct experimental demonstration that charge transport can remain uninterrupted across this type of monolithic semimetal-to-semiconductor interface.

Toward Faster and More Efficient AI Chips

The team also applied an electric field to the semiconducting region and successfully controlled the current passing through the device. That result showed that the structure could do more than simply conduct electricity. It could also perform the switching function required in transistor-based electronics.

The design still faces challenges in reliability, circuit integration, and large-scale manufacturing. However, it suggests a promising new strategy: creating both the contact and semiconductor from different regions of the same two-dimensional material.

Reference: “Nanoscale imaging of charge transport across the semimetal-semiconductor interface in monolithic platinum diselenide” by Yeongyu Kim, Minseung Gyeon, Ji Hoon Hong, Seongmun Eom, Kunwoo Park, Hongsik Park, Hae Yeon Lee, Sung Beom Cho, Kibum Kang and Seungbum Hong, 12 June 2026, Matter.
DOI: 10.1016/j.matt.2026.102873

This research was supported by the STEAM Research Program and the Nanomaterials Technology Development Program of the Ministry of Science and ICT and the National Research Foundation of Korea.

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